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| PCF2128 Integrated RTC / TCXO / Crystal Rev. 00.03 -- 4 June 2007 Preliminary [short] data sheet 1. General description The PCF2128 is a ready to run CMOS real time clock/calendar with an integrated temperature compensated crystal oscillator (TCXO). In timekeeping applications the high accuracy of the PCF2128 allows it to be used as a replacement for costly and higher powered long wave receivers or GPS receivers. A programmable battery switch-over circuit enables an uninterruptible power supply and consequently continuous timekeeping. The PCF2128 additionally features 512 bytes of general purpose RAM, a programmable watchdog, a time stamp facility and a voltage monitoring facility. Programming is possible using either an SPI or an I2C-bus interface. 2. Features Integration of a 32.768 kHz quartz crystal in the same package as the RTC temperature compensated crystal oscillator (TCXO) with integrated capacitors. accuracy: typically 3 ppm from-20 C to +70 C, typically 5 ppm from -40 C to +85 C provides year, month, day, weekday, hours, minutes and seconds programmable alarm function with interrupt capability programmable countdown timer with interrupt capability programmable watchdog timer with interrupt and reset capability timestamp function with interrupt capability battery backup input pin and switch-over circuitry extra power fail detection with input and output pins battery low detection battery backed output voltage pin 512 bytes of general purpose static RAM 1 second or 1 minute interrupt output oscillator stop detection two line bi-directional 1 MHz fast mode plus I2C interface timestamp input power-on reset 3 line SPI interface with separate data input and output (maximum speed 6.5 Mbits/s) programmable square wave output pin I2C-bus slave address: read A3H and write A2H clock operating voltage: NXP Semiconductors PCF2128 Real time clock / calendar 3. Quick reference data Table 1. Quick reference data VDD = 1.8 to 5.5 V; VSS = 0 V; Tamb = -40 to +85 C unless otherwise specified. Symbol VDD IDD Parameter supply voltage supply current interface active fSCL = 6.5 MHz fSCL = 1.0 MHz interface inactive (fSCL = 0 kHz) timekeeping and power management configuration, CLKOUT disabled; VDD = 5.0 V VDD = 3.0 V interface inactive (fSCL = 0 kHz) timekeeping configuration; Tamb = +25 C VDD = 5.0 V VDD = 3.0 V fSCL f / f Tamb Tstg SCL clock frequency frequency stability (fo = 32.768 kHz) ambient temperature storage temperature Tamb = -40 to +85 C Tamb = -20 to +70 C operating 0 -40 -65 850 450 5 3 6.5 5 +85 +150 nA nA MHz ppm ppm C C 2700 2100 nA nA 800 200 A A Conditions Min 1.8 Typ Max 5.5 Unit V 4. Ordering information Table 2: Ordering information Package Name SO20 Description plastic thin shrink small outline package; 20 leads; body width 4.4mm Version SOT163-1 Type number Topside mark PCF2128T / 1 PCF2128T PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 2 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 5. Block diagram INT 17 OSCI 32.768 kHz TCXO DIVIDER AND TIMER CONTROL 1 CONTROL 2 CONTROL 3 SECONDS 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D OSCO CLKOUT VOUT VDD VBAT VSS 7 18 20 19 8 BATTERY BACK UP SWITCH-OVER CIRCUITRY internal power supply MINUTES TEMP 1 Hz HOURS DAYS LOGIC CONTROL WEEKDAYS MONTHS YEARS OSCILLATOR MONITOR RESET SECOND ALARM MINUTE ALARM HOUR ALARM ADDRESS REGISTER DAY ALARM WEEKDAY ALARM CLOCKOUT CONTROL TIMER CONTROL COUNTDOWN TIMER RST SDA/CE SDO SDI SCL 16 4 3 2 1 SERIAL BUS INTERFACE IFS 5 INTERFACE SELECTORS 1/16 SECOND TIMESTAMP SECOND TIMESTAMP MINUTE TIMESTAMP SCL SDA/CE TS 6 I2C BUS INTERFACE HOUR TIMESTAMP DAY TIMESTAMP MONTH TIMESTAMP SCL SDO SDI SDA/CE 15 1.25 V (internal) 14 PFO TEMPERATURE SENSOR 13 TEST 512 BYTES STATIC RAM YEAR TIMESTAMP CRYSTAL AGING OFFSET RAM ADDRESS MSB RAM ADDRESS LSB RAM WRITE PFI TEMP RAM READ 001aag059_02 Fig 1. Block diagram of PCF2128 PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 3 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 6. Pinning information 6.1 Pinning SCL SDI SDO SDA/CE IFS TS CLKOUT VSS n.c. 1 2 3 4 5 6 7 8 9 20 VDD 19 VBAT 18 VOUT 17 INT 16 RST 15 PFI 14 PFO 13 TEST 12 n.c. 11 n.c. 001aag060 die oscillator PCF2128 n.c. 10 001aag576 Fig 2. Pin configuration SO20 Table 3: Symbol SCL Pin description PCF2128 Pin 1 Description combined serial clock input for both and SPI interface. May float when CE inactive. I2C Fig 3. SO20 (3d) Symbol VDD Pin 20 Description positive supply voltage SDI SDO SDA / CE 2 3 4 serial data input for SPI interface. May float when CE inactive. serial data output for SPI interface, push-pull combined serial data input / output for the I2C interface and chip enable input (active LOW) for the SPI interface. interface selector input VBAT VOUT INT 19 18 17 battery backup supply voltage battery backed output voltage interrupt output (open-drain; active LOW) reset output (open drain; active LOW) IFS 5 RST 16 * * TS CLKOUT VSS nc nc 6 7 8 9 10 connect to ground to select the SPI interface connect to VOUT (pin 18) to select the I2C interface PFI PFO TEST nc nc 15 14 13 12 11 power fail input power fail output (open drain; active LOW) Do not connect and do not use as feed through. Do not connect and do not use as feed through. Do not connect and do not use as feed through. timestamp input (active LOW) with 200 k internal pull-up resistor clock output (open drain) ground Do not connect and do not use as feed through. Do not connect and do not use as feed through. PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 4 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 7. Limiting values Table 4: Symbol VDD VBAT IDD VI VO II IO Ptot Tamb Tstg Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Parameter supply voltage backup battery supply voltage supply current input voltage output voltage input current output current total power dissipation ambient temperature storage temperature Conditions Min -0.5 -0.5 -50 -0.5 -0.5 -10 -10 -40 -65 Max +6.5 +6.5 +50 +6.5 +6.5 +10 +10 300 +85 +150 Unit V V mA V V mA mA mW C C 7.1 ESD values * ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 2000 V CDM per JESD22-C101. * Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA. 8. Application information * The PCF2128 is a ready to run real time clock; no external quartz is required. * You can set different configurations in your application depending on the PCF2128 functions you want to use. * The integration of the quartz crystal in the same package as the RTC has the following advantages: - elimination of crystal procurement issues - elimination of RTC frequency tuning - no more crystal PCB layout issues. * You can select the SPI or I2C-bus interface using the IFS pin. * By connecting a battery to VBAT an uninterruptible power supply is guaranteed. * You can use the battery backed voltage VOUT to supply an external RAM to retain RAM data in battery backup mode. * You can connect PFI through an external voltage divider to VDD to allow extra power fail detection. If not used, connect PFI to VSS. * You can connect the timestamp input pin TS to a push button for tamper detection. PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 5 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 8.1 Application example 8.1.1 Timekeeping, power management, CLKOUT, timestamp and interface active PCF2128 used for timekeeping, power management, CLKOUT and timestamp functions (see Figure 4). The interface is active. Vout supplies an external chip (e.g. SRAM). mgm002_09 VDD = 2.2 - 5.5 V microcontroller SCL SDI from PCF2128 INT RST PFO SDO CE RPU PCF2128 1 SCL VDD 20 2 SDI 3 SDO 4 SDA / CE 5 IFS 6 TS 7 CLKOUT 8 VSS 9 n.c. 10 n.c. VSS VBAT 19 VOUT 18 INT 17 RST 16 PFI 15 PFO 14 n.c. 13 n.c. 12 n.c. 11 100 nF VSS SRAM VDD R2 100 nF 100 nF RPU R1 INT to the MCU RST PFO Batt Fig 4. Application diagram: timekeeping, power management, CLKOUT, timestamp with the interface active PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 6 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 9. Revision history Table 5. Revision history Release date * * Added Figure 3. Datasheet text ammended. Section 8.1 corrected. 20070604 20070509 PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 7 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 10. Legal information 10.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 10.3 Disclaimers General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of NXP B.V. 11. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 8 of 10 NXP Semiconductors PCF2128 Real time clock / calendar Notes PCF2128_SDS_0 (c) NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 -- 4 June 2007 9 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 12. Contents 1 2 3 4 5 6 6.1 7 7.1 8 8.1 8.1.1 9 10 10.1 10.2 10.3 10.4 11 12 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 ESD values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 5 Application example . . . . . . . . . . . . . . . . . . . . . 6 Timekeeping, power management, CLKOUT, timestamp and interface active . . . . . . . . . . . . . 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 7 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Contact information. . . . . . . . . . . . . . . . . . . . . . 8 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 June 2007 Document identifier: PCF2128_SDS_0 |
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